A Novel Low Power Multiplexer-Based Full Adder

1-bit full adder circuit is a very important primitive cell in the design of Application Specific Integrated Circuits. This paper presents a novel lowpower multiplexer-based 1-bit full adder that uses 12 transistors (MBA-12T). In addition to reduced transition activity and charging recycling capability, this circuit has no direct connections to power supply nodes and the entire signal gates are directly excited by the fresh input signals, leading to noticeable reduction in short -current power consumption. Intensive HSPICE simulation shows that the new adder has more than 26% in power savings over conventional 28-transistor CMOS adder and it uses 23% less power than 10-transistor adders (SERF [1] and 10T [4]) and is 64% faster. This new MBA-12T adder thereby, is a good primitive cell to build larger low power VLSI systems.